TSMC has been actively investing in building factories in the United States, with a total investment of up to $165 billion. The plan includes building six wafer fabs, two packaging plants, and one R&D center, with future plans even including 2nm and 1.6nm level advanced processes. However, due to various reasons, only mature processes can be deployed in mainland China.
According to TSMC’s latest shareholder meeting annual report, the new TSMC plant in Arizona, USA, incurred a loss of nearly NT$14.3 billion in 2024, becoming the most money-losing overseas plant.
In the previous three years, TSMC’s US plant was also continuously losing money due to being in the early investment and construction phase, and the losses continued to expand. The losses reached NT$4.81 billion, NT$9.43 billion, and NT$10.924 billion in 2021, 2022, and 2023, respectively, totaling nearly NT$40 billion in losses over four years.
TSMC Chairman Mark Liu recently stated that building the Arizona plant is entirely based on customer demand. Once fully completed, it will contribute approximately 30% of TSMC’s 2nm and more advanced process capacity and form an independent semiconductor manufacturing cluster in the United States.
TSMC’s Arizona plant has secured support from at least five major customers, including Apple, NVIDIA, AMD, Broadcom, and Qualcomm.
The industry expects that with customers gradually entering mass production, coupled with the subsequent second and third wafer fabs, the Arizona plant will achieve economies of scale in the future and reduce the magnitude of losses.
According to TSMC, the first wafer fab in Arizona began production using 4nm process technology in the fourth quarter of last year. The construction of the second wafer fab has been completed and is currently undergoing the installation of plant system facilities, including cleanrooms (CR) and mechanical and electrical engineering. This wafer fab is expected to adopt 3nm process technology.
Meanwhile, TSMC’s layout investments in Japan and Europe have also resulted in losses of over NT$4.3 billion and NT$0.5 billion, respectively.
In mainland China, TSMC’s Nanjing-related subsidiaries achieved a profit of NT$25.954 billion last year, which has been climbing compared to NT$12.283 billion in 2021, NT$20.486 billion in 2022, and NT$21.755 billion in 2023.
In total, TSMC’s Nanjing plant has generated profits exceeding NT$80 billion over the four years.
The latest financial report shows that TSMC’s Q1 revenue was NT$839.25 billion, exceeding the expected NT$835.13 billion, with a year-on-year increase of 41.76%. Net profit was NT$361.56 billion, a year-on-year increase of 60.3%.
In US dollar terms, TSMC’s Q1 revenue was $25.53 billion, higher than the $18.873 billion in the same period last year, representing a year-on-year increase of 35.3%. At the same time, TSMC estimates its Q2 revenue to be between $28.4 billion and $29.2 billion, with an average quarter-on-quarter increase of nearly 13%.
In terms of wafer sales composition, TSMC’s 3nm process technology accounted for 22% of shipments in Q1, 5nm process technology contributed 36%, and 7nm process technology accounted for 15%. Advanced process technologies of 7nm and below accounted for a total of 73%, while other process technologies accounted for 27%.
In addition, TSMC announced in March that it intends to increase its investment in advanced semiconductor manufacturing in the United States by $100 billion. Previously, TSMC had invested $65 billion to build advanced semiconductor facilities, including two wafer fabs, in Phoenix, Arizona.
Furthermore, Intel disclosed more details about its latest Intel 18A process at the 2025 VLSI Symposium.
The latest data shows that Intel 18A offers high-performance (HP) and high-density (HD) libraries with full-featured technology design capabilities and enhanced design ease of use.
In PPA (performance, power, area) comparisons on standard Arm core architecture chips, Intel 18A achieved a 25% speed improvement and a 36% power reduction at 1.1V.
In addition, Intel 18A has a higher area utilization rate than Intel 3, meaning that this process can achieve better area efficiency and the potential for higher-density designs.
Previously released information on Intel’s official website shows that Intel 18A uses RibbonFET gate-all-around (GAA) transistor technology, which enables precise control of current flow, and also pioneers the industry’s first PowerVia backside power delivery technology.
Intel also presented voltage drop maps depicting the stability of the node under high-performance conditions. Due to Intel 18A’s PowerVia power delivery technology, this process can provide more stable power transmission.
Comparisons show that through backside power delivery technology, Intel achieves tighter cell packaging and improves area efficiency, mainly because it frees up more space compared to front-side wiring.
Based on the currently disclosed information, if the yield rate is good, the Intel 18A process will become a strong competitor to TSMC’s 2nm process.
The market expects that Intel 18A will first be applied to Panther Lake SoCs and Xeon’s Clearwater Forest CPUs, with end products expected to appear as early as 2026.
