Recently, Intel showcased its latest advancements in chip packaging at the Electronic Components Technology Conference. These breakthroughs include EMIB-T technology, a new decomposed heatsink design, and an optimized large thermocompression bonding process. These innovative technologies provide crucial support for high-performance computing and memory integration, particularly in applications involving HBM4 memory and UCIe interconnect technology, aiming to maximize packaging efficiency, thermal dissipation, and manufacturing reliability.
EMIB-T Technology: Enhanced Interconnects and Power Delivery #
EMIB-T technology is an upgraded version of Intel’s Embedded Multi-die Interconnect Bridge (EMIB). It optimizes power delivery and data communication between chips by integrating Through-Silicon Vias (TSVs). Traditional EMIB uses cantilevered power delivery paths, which lead to higher voltage drops. EMIB-T, however, utilizes TSVs to supply power directly from the bottom of the package, reducing resistance and providing stable power support for high-bandwidth memory like HBM4 and HBM4e.
Simultaneously, TSV technology enhances inter-chip communication bandwidth and supports UCIe-A interconnect technology, enabling data transfer rates of over 32 Gb/s. To mitigate signal noise, Intel has integrated high-power MIM capacitors into the bridge, ensuring signal transmission stability.
EMIB-T also supports larger package sizes, up to 120x180 millimeters, allowing for the integration of over 38 bridges and 12 rectangular dies in a single package. In terms of interconnect density, EMIB-T has achieved a 45-micron bump pitch, with plans to support 35-micron and even 25-micron pitches in the future, further enhancing chip integration. This technology is compatible with both organic and glass substrates, with the latter being a key focus of Intel’s future packaging strategy. Glass substrates offer superior flatness and thermal stability, which helps achieve finer interconnects and more efficient signal transmission.
Decomposed Heatsink Design: Addressing Thermal Challenges #
With the rapid advancement of AI and data center applications, chip power consumption and package sizes continue to increase, making thermal management a critical challenge. Intel’s new decomposed heatsink technology optimizes coupling with the Thermal Interface Material (TIM) by separating the heatsink into a flat plate and fins. This design reduces TIM solder voids by approximately 25%, significantly improving thermal conductivity.
The design also supports heatsinks with integrated microchannels, where liquid can directly cool the processor through an Integrated Heat Spreader (IHS). This solution is suitable for chip packages with a Thermal Design Power (TDP) of up to 1000W, providing a reliable thermal management solution for high-performance computing platforms.
Optimized Thermocompression Bonding: Enhancing Manufacturing Reliability Additionally, Intel has developed a new thermocompression bonding process specifically for large package substrates. This process addresses the warping issue between chips and substrates during bonding. By minimizing thermal differences, it improves manufacturing yield and reliability, supports larger chip package sizes, and enables finer EMIB connection pitches. This not only enhances EMIB-T’s interconnect density but also provides greater flexibility for complex heterogeneous chip designs.
Strategic Importance for Intel Foundry Services #
These technological breakthroughs are a vital component of Intel’s foundry strategy. Modern processors increasingly adopt heterogeneous designs, integrating different components like CPUs, GPUs, and memory into a single package to boost performance and energy efficiency. Advanced packaging technology is central to achieving this goal, and Intel, through continuous innovation, strives to stay competitive with rivals like TSMC. Advancements in technologies like EMIB-T allow Intel to support customers in integrating chips from various sources into a single package, reducing production risks while offering packaging services to clients such as AWS and Cisco.
Currently, chip packaging has become a significant revenue stream for Intel Foundry Services. Compared to producing chips with cutting-edge process nodes, packaging services have shorter lead times, enabling quicker responses to market demand. Intel also provides packaging services for chips that do not use its manufactured components, further expanding its customer base. This flexible business model helps Intel secure a more favorable position in the global foundry market.
Future Outlook #
Looking ahead, Intel plans to further optimize EMIB-T’s interconnect density and power efficiency while promoting the widespread adoption of glass substrate technology. These technologies will not only support the demands of next-generation high-performance computing and AI chips but also solidify Intel’s technological leadership in advanced packaging. With the proliferation of standards like HBM4 and UCIe, Intel’s packaging technologies are expected to play a larger role in data centers, edge computing, and consumer electronics, providing more efficient and reliable solutions for the industry.